Index: driver/dvb_frontend.c
===================================================================
RCS file: /cvs/linuxtv/DVB/driver/dvb_frontend.c,v
retrieving revision 1.43
diff -u -r1.43 dvb_frontend.c
--- driver/dvb_frontend.c	20 Feb 2003 14:56:29 -0000	1.43
+++ driver/dvb_frontend.c	6 Mar 2003 22:23:23 -0000
@@ -384,6 +384,9 @@
 	}
 #endif
 
+	if (fe->info->type != FE_QPSK)
+		return;
+
 	/**
 	 *  let's start a zigzag scan to compensate LNB drift...
 	 */
Index: driver/frontends/ves1820.c
===================================================================
RCS file: /cvs/linuxtv/DVB/driver/frontends/ves1820.c,v
retrieving revision 1.15
diff -u -r1.15 ves1820.c
--- driver/frontends/ves1820.c	27 Nov 2002 11:24:20 -0000	1.15
+++ driver/frontends/ves1820.c	6 Mar 2003 22:23:23 -0000
@@ -180,7 +180,7 @@
 	if (tuner_type == 0xff)     /*  PLL not reachable over i2c ...  */
 		return 0;
 
-	div = (freq + 36250000 + 31250) / 62500;
+	div = (freq + 35937500 + 31250) / 62500;
 	buf[0] = (div >> 8) & 0x7f;
 	buf[1] = div & 0xff;
 	buf[2] = byte3[tuner_type];
@@ -199,9 +199,15 @@
 
 
 static
-int ves1820_setup_reg0 (struct dvb_frontend *fe, u8 reg0)
+int ves1820_setup_reg0 (struct dvb_frontend *fe, u8 reg0,
+			fe_spectral_inversion_t inversion)
 {
 	reg0 |= GET_REG0(fe->data) & 0x62;
+
+	if (INVERSION_ON == inversion)
+		reg0 &= ~0x20;
+	else if (INVERSION_OFF == inversion)
+		reg0 |= 0x20;
 	
 	ves1820_writereg (fe, 0x00, reg0 & 0xfe);
         ves1820_writereg (fe, 0x00, reg0 | 0x01);
@@ -209,7 +232,7 @@
 	/**
 	 *  check lock and toggle inversion bit if required...
 	 */
-	if (!(ves1820_readreg (fe, 0x11) & 0x08)) {
+	if (INVERSION_AUTO == inversion && !(ves1820_readreg (fe, 0x11) & 0x08)) {
 		ddelay(1);
 		if (!(ves1820_readreg (fe, 0x11) & 0x08)) {
 			reg0 ^= 0x20;
@@ -306,7 +312,7 @@
 			    struct dvb_frontend_parameters *p)
 {
 	static const u8 reg0x00 [] = { 0x00, 0x04, 0x08, 0x0c, 0x10 };
-	static const u8 reg0x01 [] = {  140,  140,  106,  120,   92 };
+	static const u8 reg0x01 [] = {  140,  140,  106,  100,   92 };
 	static const u8 reg0x05 [] = {  135,  100,   70,   54,   38 };
 	static const u8 reg0x08 [] = {  162,  116,   67,   52,   35 };
 	static const u8 reg0x09 [] = {  145,  150,  106,  126,  107 };
@@ -324,7 +330,7 @@
         ves1820_writereg (fe, 0x08, reg0x08[real_qam]);
         ves1820_writereg (fe, 0x09, reg0x09[real_qam]);
 
-	ves1820_setup_reg0 (fe, reg0x00[real_qam]);
+	ves1820_setup_reg0 (fe, reg0x00[real_qam], p->inversion);
 
 	return 0;
 }